INESC-ID contributes to Europe’s digital autonomy in high-performance computing and AI through the DARE Project

INESC-ID is one of 38 partners involved in a major European effort to build a sovereign computing infrastructure through the new project DARE SGA1 – Digital Autonomy with RISC-V in Europe.

Our contribution will be on the project’s software ecosystem, in collaboration with INESC TEC, with a focus on optimizing performance for RISC-V architectures – an open-source, modular instruction set architecture that enables anyone to design custom processors without licensing fees, promoting technological independence and innovation. And also integrating HPC and AI applications, and enabling co-design approaches between hardware and software teams.

Backed by €240 million in funding from the EuroHPC Joint Undertaking, the project marks a strategic step toward reducing Europe’s dependence on non-EU hardware and software in the fields of High-performance Computing (HPC) and Artificial Intelligence (AI).

Coordinated by the Barcelona Supercomputing Center (BSC-CNS), DARE SGA1 will design and develop next-generation processors and a full software ecosystem based on RISC-V, an open standard instruction set architecture. The initiative’s goal is to create a fully European HPC technology stack to support scientific research, industrial innovation, and public-sector digital infrastructure.

“INESC-ID’s long-standing expertise in computer architecture and HPC positions us well to support this ambitious European initiative,” said Leonel Sousa, INESC-ID researcher, responsible for the Portuguese participation in Dare, and professor at Instituto Superior Técnico.

The first three years of DARE SGA1 will focus on building three RISC-V-based chiplets: a general-purpose processor (led by Codasip), a high-precision vector accelerator (led by Openchip), and an AI inference engine (led by Axelera AI). These components will form the backbone of Europe’s future supercomputing systems, offering greater energy efficiency and scalability than traditional monolithic chips.

“There’s no AI without HPC”, notes Leonel Sousa. “At the core of the project lies Europe’s ambition to become self-reliant in semiconductor and chip design. It’s crucial to reduce our dependency on foreign chip supply”, underlines the researcher.

DARE SGA1 is the first phase of a six-year roadmap to secure Europe’s digital autonomy in HPC and AI infrastructure. The project is expected to lay the groundwork for the EU’s first fully sovereign supercomputing system by the end of its initial phase.

This article was first published on 28 April by INESC-ID