Surrey NanoSystems raises £2.5M in second round

Funding round completed

Spin-out Surrey NanoSystems has secured second round funding of £2.5 million from Octopus Ventures, IP Group plc, Surrey University and other investors, for the commercialisation of its low-temperature process for growing carbon nanotubes for use as an interconnection technology in semiconductor devices. This development is intended to help silicon chip manufacturers to overcome a critical problem that threatens the evolution to next-generation geometry sizes, speeds and power conservation.

Octopus Ventures, invested £1.75 million, while Surrey NanoSystems’ founding VC investor IP Group together with the university and other investors provided £750,000.

Chip manufacturers currently use copper to provide the vertical interconnections required to make integrated circuits, but this material is running into technical difficulties as integrated circuits become smaller. Carbon nanotubes can be structured to act as extremely efficient conductors, but their adoption as a replacement for copper has been hindered by the fact that conventionally grown nanotubes require temperatures of around 700 degrees centigrade, too high for semiconductor processing.  In contrast, Surrey NanoSystems’ fabrication system and process allows carbon nanotube structures to be grown at silicon-friendly processing temperatures of 350 ºC or less.

“The semiconductor industry urgently needs a new interconnection technology. If you can solve the problem of growing precision carbon nanotubes at silicon-friendly temperatures – and we have – it opens up a massive potential market,” says Ben Jensen, Chief Technical Officer of Surrey NanoSystems. 

Surrey NanoSystems was spun out from the university’s Advanced Technology Institute, with the help of experts in the design of thin-film deposition systems. The institute had developed the technique for carbon nanotubes at low temperature. This combination of knowhow allowed the company to develop its NanoGrowth technology to grow precision carbon nanotubess at both the temperatures and densities needed for for CMOS (complementary metal-oxide semiconductor) chips.

The initial focus of Surrey NanoSystems was on providing equipment to developers researching and prototyping carbon nanotubes to advance the performance and integration density of semiconductors and electronic devices. The company’s focus is now on optimising its technology for the mass-volume manufacturing environment, by scaling the hardware and refining and scaling the materials processing technology.

It aims to scale up from the current 100 mm wafer size capability to the 300 mm sizes used in commercial wafer fabrication. Surrey NanoSystems will also add an industry-standard SEMI interface to its process equipment, allowing it to be integrated easily onto standard wafer-processing cluster tools. Alongside this development work, Surrey NanoSystems is pursuing technology partnerships with both semiconductor manufacturers and volume cluster tool suppliers.